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LC01707PLF
Definition of each bit
1) Slave address
The slave address consists of seven-bit fixed address "1110000" or "1110001", which is unique to a chip, and the
eighth-bit data direction bit(R/W). Sending (writing) is processed when the data direction bit is"0", and receiving
(reading) is processed when it is "1". The fixed address is set to "1110001" at DEVAR=1 and it is set to "1110000" at
DEVAR=0.
MSB
LSB
1
1
1
0
0
0
1/0
R/W
R/W
BIT
Fixed address
READ
WRITE
1
0
2) Register address
Since the total number of internal register is 34, 2-bit data set on the MSB side becomes invalid. 64 addresses are
accepted 6 bits are used, but only 34 registers are used.
MSB
LSB
0
0
A5
A4
A3
A2
A1
A0
Invakid address
Valid address
3) Register data
Each register data consists of eight bits.
D7
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
No.A1928-12/18
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